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1 lt1251/LT1256 40mhz video fader and dc gain controlled amplifier typical applicatio n u two-input video fader + + in1 in2 2.5vdc input r f2 1.5k v out r f1 1.5k i fs i c i c v + v null 1251/56 ta01 0v to 2.5v control 2 + + 1 2 3 4 5 6 7 14 13 12 11 10 9 8 control lt1251/LT1256 1 cfs 5k 5k i fs LT1256 gain accuracy vs control voltage features descriptio n u n accurate linear gain control: 1% typ, 3% max n constant gain with temperature n wide bandwidth: 40mhz n high slew rate: 300v/ m s n fast control path: 10mhz n low control feedthrough: 2.5mv n high output current: 40ma n low output noise 45nv/ ? hz at a v = 1 270nv/ ? hz at a v = 100 n low distortion: 0.01% n wide supply range: 2.5v to 15v n low supply current: 13ma n low differential gain and phase: 0.02%, 0.02 , ltc and lt are registered trademarks of linear technology corporation. applicatio n s u n composite video gain control n rgb, yuv video gain control n video faders, keyers n gamma correction amplifiers n audio gain control, faders n multipliers, modulators n electronically tunable filters the lt ? 1251/LT1256 are 2-input, 1-output, 40mhz cur- rent feedback amplifiers with a linear control circuit that sets the amount each input contributes to the output. these parts make excellent electronically controlled vari- able gain amplifiers, filters, mixers and faders. the only external components required are the power supply by- pass capacitors and the feedback resistors. both parts operate on supplies from 2.5v (or single 5v) to 15v (or single 30v). absolute gain accuracy is trimmed at wafer sort to mini- mize part-to-part variations. the circuit is completely temperature compensated. the lt1251 includes circuitry that eliminates the need for accurate control signals around zero and full scale. for control signals of less than 2% or greater than 98%, the lt1251 sets one input completely off and the other completely on. this is ideal for fader applications because it eliminates off-channel feedthrough due to offset or gain errors in the control signals. the LT1256 does not have this on/off feature and operates linearly over the complete control range. the LT1256 is recommended for applications requiring more than 20db of linear control range. control voltage (v) 0 gain accuracy (%) 5 4 3 2 1 0 ? ? ? ? ? 2.0 1251/56 ta02 0.5 1.0 1.5 2.5 v s = 5v v fs = 2.5v 100 gain accuracy (%) = a vmeas ? () v c 2.5 ()
2 lt1251/LT1256 order part number total supply voltage (v + to v C ) .............................. 36v input current ...................................................... 15ma input voltage on pins 3,4,5,10,11,12 ............... v C to v + output short-circuit duration (note 1) ........ continuous specified temperature range (note 2) ....... 0 c to 70 c operating temperature range ............... C 40 c to 85 c storage temperature range ................. C 65 c to 150 c junction temperature (note 3)............................ 150 c lead temperature (soldering, 10 sec).................. 300 c package/order i n for m atio n w u u absolute m axi m u m ratings w ww u lt1251cn lt1251cs LT1256cn LT1256cs t jmax = 150 c, q ja = 70 c/ w (n) t jmax = 150 c, q ja = 100 c/ w (s) consult factory for industrial and military grade parts. sig al a plifier ac characteristics u w 0 c t a 70 c, v s = 5v, v in = 1v rms , f = 1khz, a vmax = 1, r f1 = r f2 = 1.5k, v fs = 2.5v, i c = i fs = null = open, pins 5,10 = gnd, unless otherwise noted. (note 2) + + top view n package 14-lead pdip s package 14-lead plastic so in2 fb2 v fs i fs r fs v + v out 2 + + 1 2 3 4 5 6 7 in1 fb1 v c i c r c null v 14 13 12 11 10 9 8 control 1 cfs symbol parameter conditions min typ max units 2%in1 2% input 1 gain v c (pin 3) = 0.05v lt1251 l 0 0.1 % LT1256 l 0.1 5.0 % 10%in1 10% input 1 gain v c (pin 3) = 0.25v l 713% 20%in1 20% input 1 gain v c (pin 3) = 0.50v l 17 23 % 30%in1 30% input 1 gain v c (pin 3) = 0.75v l 27 33 % 40%in1 40% input 1 gain v c (pin 3) = 1.00v l 37 43 % 50%in1 50% input 1 gain v c (pin 3) = 1.25v l 47 53 % 60%in1 60% input 1 gain v c (pin 3) = 1.50v l 57 63 % 70%in1 70% input 1 gain v c (pin 3) = 1.75v l 67 73 % 80%in1 80% input 1 gain v c (pin 3) = 2.00v l 77 83 % 90%in1 90% input 1 gain v c (pin 3) = 2.25v l 87 93 % 98%in1 98% input 1 gain v c (pin 3) = 2.45v lt1251 l 99.9 100.0 % LT1256 l 95.0 99.9 % 2%in2 2% input 2 gain v c (pin 3) = 2.45v lt1251 l 0 0.1 % LT1256 l 0.1 5.0 % 10%in2 10% input 2 gain v c (pin 3) = 2.25v l 713% 20%in2 20% input 2 gain v c (pin 3) = 2.00v l 17 23 % 30%in2 30% input 2 gain v c (pin 3) = 1.75v l 27 33 % 40%in2 40% input 2 gain v c (pin 3) = 1.50v l 37 43 % 50%in2 50% input 2 gain v c (pin 3) = 1.25v l 47 53 % 60%in2 60% input 2 gain v c (pin 3) = 1.00v l 57 63 % 70%in2 70% input 2 gain v c (pin 3) = 0.75v l 67 73 % 80%in2 80% input 2 gain v c (pin 3) = 0.50v l 77 83 % 90%in2 90% input 2 gain v c (pin 3) = 0.25v l 87 93 % 98%in2 98% input 2 gain v c (pin 3) = 0.05v lt1251 l 99.9 100.0 % LT1256 l 95.0 99.9 % gain drift with temperature v c (pin 3) = 0.75v n package 50 ppm/ c (worst case at 30% gain) v c (pin 3) = 0.75v s package 400 ppm/ c
3 lt1251/LT1256 symbol parameter conditions min typ max units gain supply rejection v c = 1.25v, v s = 5v to 15v l 0.03 0.10 %/v external resistor gain pins 5,10 = open, external 5k resistors l 45 55 % 50% input 1 from pins 4,11 to ground, v c = 1.25v sr slew rate v in = 2.5v, v o at 2v, r l = 150 w l 150 300 v/ m s control feedthrough v c = 1.25vdc + 2.5v p-p at 1khz 2.5 mv p-p full power bandwidth v o = 1v rms 20 mhz bw small-signal bandwidth v s = 5v 30 mhz v s = 15v 40 mhz differential gain (notes 4,5) control = 0% or 100% 0.02 % control = 25% or 75% 0.90 % differential phase (notes 4,5) control = 0% or 100% 0.02 deg control = 25% or 75% 0.55 deg thd total harmonic distortion gain = 100% 0.002 % gain = 50% 0.015 % gain = 10% 0.4 % t r , t f rise time, fall time 10% to 90%, v o = 100mv 11 ns os overshoot v o = 100mv 3 % t pd propagation delay v o = 100mv 10 ns t s settling time 0.1%, d v o = 2v 65 ns sig al a plifier ac characteristics u w 0 c t a 70 c, v s = 5v, v in = 1v rms , f = 1khz, a vmax = 1, r f1 = r f2 = 1.5k, v fs = 2.5v, i c = i fs = null = open, pins 5,10 = gnd, unless otherwise noted. sig al a plifier dc characteristics u w 0 c t a 70 c, v s = 5v, v cm = 0v, v fs = 2.5v, i c = i fs = null = open, pins 5,10 = gnd, unless otherwise noted. symbol parameter conditions min typ max units v os input offset voltage either input l 25 mv difference between inputs l C3 1 3 mv input offset voltage drift 10 m v/ c i in + noninverting input bias current either input l C 2.5 0.5 2.5 m a i in C inverting input bias current either input l C30 10 30 m a difference between inputs l C 1 0.5 1 m a inverting input bias current null change null (pin 6) open to v C l C 280 C 170 C 60 m a e n input noise voltage density f = 1khz 2.7 nv/ ? hz +i n noninverting input noise current density f = 1khz 1.5 pa/ ? hz Ci n inverting input noise current density f = 1khz 29 pa/ ? hz r in input resistance either noninverting input l 517 m w c in input capacitance either noninverting input l 1.5 pf input voltage range v s = 5v l 3 3.2 v v s = 5v l 2 3 v cmrr common mode rejection ratio v cm = C 3v to 3v l 55 61 db v s = 5v, v cm = 2v to 3v, v o = 2.5v l 50 57 db inverting input current common mode rejection v cm = C 3v to 3v l 0.07 0.25 m a/v v s = 5v, v cm = 2v to 3v, v o = 2.5v l 0.17 0.70 m a/v psrr power supply rejection ratio v s = 5v to 15v l 70 76 db noninverting input current power supply rejection v s = 5v to 15v l 30 100 na/v inverting input current power supply rejection v s = 5v to 15v l 30 200 na/v
4 lt1251/LT1256 sig al a plifier dc characteristics u w 0 c t a 70 c, v s = 5v, v cm = 0v, v fs = 2.5v, i c = i fs = null = open, pins 5,10 = gnd, unless otherwise noted. symbol parameter conditions min typ max units a vol large-signal voltage gain v o = C 3v to 3v, r l = 150 w 83 93 db v o = C 2.75v to 2.75v, r l = 150 w l 83 db r ol transresistance, d v out / d i in C v o = C 3v to 3v, r l = 150 w 0.75 1.8 m w v o = C 2.75v to 2.75v, r l = 150 w l 0.75 m w v out maximum output voltage swing no load l 4.0 4.2 v r l = 150 w 3.0 3.5 v l 2.75 v v s = 15v, no load l 14.0 14.2 v v s = 5v, v cm = 2.5v, (note 6) l 1.2 3.8 v i o maximum output current v s = 5v l 30 40 ma v s = 5v, v cm = v o = 2.5v l 20 30 ma i s supply current v c = v fs = 2.5v l 13.5 17.0 ma v c = v fs = 1.25v l 7.5 9.5 ma v c = v fs = 0v l 1.3 1.8 ma v c = v fs = 2.5v, v s = 15v l 14.5 18.5 ma v c = v fs = 0v, v s = 15v l 1.4 2.0 ma co trol a d full scale a plifier characteristics u u w 0 c t a 70 c, v s = 5v, v fs = 2.5v, i c = i fs = null = open, pins 5,10 = gnd, unless otherwise noted. symbol parameter conditions min typ max units control amplifier input offset voltage pin 4 to pin 3 l 515 mv full-scale amplifier input offset voltage pin 11 to pin 12 l 515 mv control amplifier input resistance l 25 100 m w full-scale amplifier input resistance l 25 100 m w control amplifier input bias current l C 750 C 300 na full-scale amplifier input bias current l C 750 C 300 na r c internal control resistor t a = 25 c 3.75 5 6.25 k w r fs internal full-scale resistor t a = 25 c 456 k w resistor temperature coefficient 0.2 %/ c control path bandwidth small signal, v c = 100mv, (note 7) 10 mhz control path rise and fall time small signal, v c = 100mv, (note 7) 35 ns control path transition time 0% to 100% 150 ns control path propagation delay small signal, d v c = 100mv 50 ns v c from 0% or 100% 90 ns the l denotes specifications which apply over the specified operating temperature range. note 1: a heat sink may be required depending on the power supply voltage. note 2: commercial grade parts are designed to operate over the temperature range of C 40 c to 85 c but are neither tested nor guaranteed beyond 0 c to 70 c. industrial grade parts specified and tested over C40 c to 85 c are available on special request. consult factory. note 3: t j is calculated from the ambient temperature t a and the power dissipation p d according to the following formulas: lt1251cn/LT1256cn: t j = t a + (p d ? 70 c/w) lt1251cs/LT1256cs: t j = t a + (p d ? 100 c/w) note 4: differential gain and phase are measured using a tektronix tsg120yc/ntsc signal generator and a tektronix 1780r video measurement set. the resolution of this equipment is 0.1% and 0.1 . five identical amplifier stages were cascaded giving an effective resolution of 0.02% and 0.02 . note 5: differential gain and phase are best when the control is set at 0% or 100%. see the typical performance characteristics curves. note 6: tested with r l = 150 w to 2.5v to simulate an ac coupled load. note 7: small-signal control path response is measured driving r c (pin 5) to eliminate peaking caused by stray capacitance on pin 4.
5 lt1251/LT1256 control voltage (v) 0 gain (v/v) 1.0 0.8 0.6 0.4 0.2 0 2.0 1251/56 g01 0.5 1.0 1.5 2.5 v fs = 2.5v in2 in1 typical perfor m a n ce characteristics uw lt1251/LT1256 control path bandwidth frequency (hz) voltage gain (db) 10 8 6 4 2 0 ? ? ? ? ?0 10k 1m 10m 100m 1251/56 g04 100k voltage drive v c v s = 5v pin 4 not in socket thd plus noise vs frequency frequency (hz) 0.01 thd + noise (%) 0.1 1 10 10 1k 10k 1251/56 g08 0.001 100 100k v c cc = 10% v c cc = 50% v c cc = 100% v s cc = 5v, v in = 1v rms a v = 1, r f = 1.5k, v fs = 2.5v control voltage (v) 0 gain (v/v) 1.0 0.8 0.6 0.4 0.2 0 2.0 1251/56 g02 0.5 1.0 1.5 2.5 v fs = 2.5v in2 in1 frequency (hz) 100k output voltage (v p-p ) 8 7 6 5 4 3 2 1 1m 10m 100m 1251/56 g07 a v = 10 a v = 1 v s = 5v r l = 1k r f = 1.5k v c = v fs = 2.5v undistorted output voltage vs frequency frequency (hz) voltage gain (db) 10 8 6 4 2 0 ? ? ? ? ?0 10k 1m 10m 100m 1251/56 g05 100k voltage drive r c v c = gnd v s = 5v lt1251/LT1256 control path bandwidth frequency (mhz) 05 3rd order intercept (dbm) 10 20 15 25 30 1251/56 g10 50 45 40 35 30 25 20 15 10 v s cc = ?5v a v = 1 r f = 1.5k r l = 100 w v c = v fs = 2.5v 3rd order intercept vs frequency 2nd and 3rd harmonic distortion vs frequency frequency (mhz) 1 distortion (dbc) 20 30 40 50 60 ?0 10 100 1251/56 g09 v s cc = 5v a v = 1 r f = 1.5k r l = 1k v o = 2v p-p v c = v fs = 2.5v 3rd 2nd frequency (hz) 10 1 10 100 100 1k 10k 1251/56 g06 spot noise (nv/ ? hz or pa/ ? hz) +i n e n ? n spot input noise voltage and current vs frequency lt1251 gain vs control voltage LT1256 gain vs control voltage
6 lt1251/LT1256 typical perfor m a n ce characteristics uw frequency (hz) 100k voltage gain (db) phase shift (deg) 1m 10m 100m 1251/56 g13 5 4 3 2 1 0 ? ? ? ? ? 45 0 45 90 135 180 225 270 v s = 5v r f = 1.3k r l = 100 w phase gain voltage gain and phase vs frequency bandwidth vs feedback resistance, a v = 1, r l = 1k feedback resistance (k w ) 0.6 3db bandwidth (mhz) 70 60 50 40 30 20 10 0.8 1.0 1.2 1.4 1251/56 g12 1.6 1.8 peaking 0.5db peaking 5.0db v s = 15v v s = 5v v s = 5v feedback resistance (k w ) 0.6 3db bandwidth (mhz) 70 60 50 40 30 20 10 0.8 1.0 1.2 1.4 1251/56 g11 1.6 1.8 peaking 0.5db peaking 5.0db v s = 15v v s = 5v v s = 5v bandwidth vs feedback resistance, a v = 1, r l = 100 w bandwidth vs feedback resistance, a v = 10, r l = 100 w feedback resistance (k w ) 0.4 3db bandwidth (mhz) 60 50 40 30 20 10 0.6 0.8 1.0 1.2 1251/56 g14 1.4 1.6 peaking 0.5db peaking 5.0db v s = 5v v s = 15v v s = 5v bandwidth vs feedback resistance, a v = 100, r l = 100 w feedback resistance (k w ) 0.2 0.4 ?db bandwidth (mhz) 2.0 1251/56 g17 0.6 0.8 1.0 1.4 1.2 1.6 1.8 10 9 8 7 6 5 4 3 2 v s = 15v v s = 5v v s = 5v no peaking bandwidth vs feedback resistance, a v = 10, r l = 1k feedback resistance (k w ) 0.4 3db bandwidth (mhz) 60 50 40 30 20 10 0.6 0.8 1.0 1.2 1251/56 g15 1.4 1.6 peaking 0.5db peaking 5.0db v s = 5v v s = 15v v s = 5v bandwidth vs feedback resistance, a v = 100, r l = 1k feedback resistance (k w ) 0.2 0.4 ?db bandwidth (mhz) 2.0 1251/56 g18 0.6 0.8 1.0 1.4 1.2 1.6 1.8 10 9 8 7 6 5 4 3 2 v s = 15v v s = 5v v s = 5v no peaking frequency (hz) off-channel isolation (db) 0 10 20 30 40 50 60 70 80 90 100 10k 1m 10m 100m 1251/56 g16 100k v s = 5v v fs = 2.5v v c = 0v r l = 100 w r f = 1.5k a v = 10 a v = 1 off-channel isolation vs frequency C3db bandwidth vs control voltage control voltage (v) 0 ?db bandwidth (mhz) 40 35 30 25 20 15 10 0.5 1.0 1.5 2.0 1251/56 g19 2.5 v s = ?v r l = 100 w v fs = 2.5v r f = 1.3k
7 lt1251/LT1256 typical perfor m a n ce characteristics uw input common mode range vs temperature control and full-scale amp input bias current vs input voltage null voltage, referenced to v (mv) 02040 inverting input bias current ( m a) 60 100 120 80 140 160 1251/56 g24 200 150 100 50 0 50 100 150 200 t a = 55? t a = 125? v s = 5v v fs = 1.25v t a = 25? inverting input bias current vs null voltage inverting input bias current vs null voltage null voltage, referenced to v (mv) 050 inverting input bias current ( m a) 100 200 150 250 300 1251/56 g23 400 300 200 100 0 100 200 300 400 t a = 55? t a = 125? v s = 5v v fs = 2.5v t a = 25? positive output saturation voltage vs load current load current (ma) 0 saturation voltage, v + ?v out (v) 10 20 30 40 1251/56 g26 1.7 1.5 1.3 1.1 0.9 0.7 0.5 t a = 55? t a = 125? v s = 5v t a = 25? negative output saturation voltage vs load current 3.0 2.5 2.0 1.5 1.0 0.5 1251/56 g27 load current (ma) 0 saturation voltage, v out ?v (v) ?0 20 ?0 40 t a = 55? t a = 125? v s = 5v t a = 25? output short-circuit current vs temperature temperature (?) ?0 output short-circuit current (ma) 60 50 40 30 25 75 1251/56 g28 ?5 0 50 100 125 supply current vs full-scale voltage supply current vs full-scale current input voltage (v) 0 input bias current (na) 3 5 1251/56 g25 12 4 400 350 300 250 200 150 100 ?0 0 t a = 55? t a = 125? v s 3 7.5v t a = 25? full-scale voltage, v fs (v) 0 14 12 10 8 6 4 2 0 1.5 1251/56 g20 0.5 1.0 2.0 2.5 supply current (ma) v s = 5v internal resistors t a = 55 c, t a = 25 c t a = 125 c full-scale current, i fs ( m a) 0 supply current (ma) 14 12 10 8 6 4 2 0 1251/56 g21 200 500 100 300 400 v s = 5v v c = 0v t a = 55 c t a = 125 c temperature ( c) ?0 25 common mode range (v) 100 75 v + v + ? v + ? v ? +2 v ? +1 v 1251/56 g22 0 25 50 125
8 lt1251/LT1256 typical perfor m a n ce characteristics uw slew rate vs temperature slew rate vs full-scale reference voltage temperature (?) ?0 slew rate (v/ m s) 100 1251/56 g30 050 350 300 250 200 25 25 75 125 v s = ?v a v = 1 no load frequency (hz) 1k power supply rejection ratio (db) 80 70 60 50 40 30 20 10 0 100k 10k 1251/56 g31 1m 10m v s = ?v a v = 1 r f = 1.5k v c = v fs = 2.5v positive negative power supply rejection ratio vs frequency settling time to 1mv vs output step output impedance vs frequency frequency (hz) output impedance ( w ) 100 10 1 0.1 0.01 10k 1m 10m 1251/56 g34 100k 100m v s = 5v r f = 1.5k v c = v fs = 2.5v a v = 100 a v = 1, 10 settling time (ns) 0 output step (v) 25 50 75 100 1251/56 g32 125 10 8 6 4 2 0 ? ? ? ? ?0 150 v s = 15v r f = 1.5k inverting, noninverting inverting noninverting settling time to 10mv vs output step settling time (ns) 0 output step (v) 50 100 1251/56 g33 150 10 8 6 4 2 0 ? ? ? ? ?0 200 inverting inverting noninverting noninverting v s = 15v r f = 1.5k differential phase vs controlled gain differential gain vs controlled gain controlled gain, v c /v fs (%) 50 differential gain (%) 2 1 0 90 1251/56 g35 60 70 80 100 controlled gain, v c /v fs (%) 50 differential phase (deg) 1.0 0.5 0 90 1251/56 g36 60 70 80 100 lt1251 switching transient (glitch) 50mv 0 C 50mv 2.5 0 v fs = 2.5v r f1 = r f2 = 1.5k v s = 5v 1251/56 g37 v c v out full-scale reference voltage (v) 0 350 300 250 200 150 100 50 0 1.5 1251/56 g29 0.5 1.0 2.0 2.5 slew rate (v/ m s) a v = 1 v s = 15v v s = 5v
9 lt1251/LT1256 si plified sche atic w w + + + i 4 i 5 i 3 1251/56 ss q5 q16 q17 q6 r1 250 w q7 q2 q1 r2 250 w r3 250 w r4 250 w r5 200 w r6 200 w r7 200 w r11 200 w r9 200 w r8 200 w r10 400 w r c 5k r fs 5k i c v fs r c r fs i fs v c q8 q9 q19 q20 q21 q22 q12 q13 q23 q24 q25 q26 q27 q28 q33 q34 q35 q40 q41 q44 q45 q47 q46 q43 q42 in1 fb1 fb2 q15 q14 q3 q4 q18 q29 q30 q31 q32 q36 q37 q38 q39 q52 q53 q56 v cc v cc d1 null v ee v ee out q55 q57 q58 q61 q60 q59 in2 q48 q49 q50 q51 + i 1 + i 2 q54 + i 6 q10 q11 d2 d3 d4 i 7
10 lt1251/LT1256 applicatio n s i n for m atio n wu u u supply voltage the lt1251/LT1256 are high speed amplifiers. to prevent problems, use a ground plane with point-to-point wiring and small bypass capacitors (0.01 m f to 0.1 m f) at each supply pin. for good settling characteristics, especially driving heavy loads, a 4.7 m f tantalum within an inch or two of each supply pin is recommended. the lt1251/LT1256 can be operated on single or split supplies. the minimum total supply is 4v (pins 7 to 9). however, the input common mode range is only guaran- teed to within 2v of each supply. on a 4v supply the parts must be operated in the inverting mode with the noninvert- ing input biased half way between pin 7 and pin 9. see the typical applications section for the proper biasing for single supply operation. the op amps in the control section operate from v C (pin 7) to within 2v of v + (pin 9). for this reason the positive supply should be 4.5v or greater in order to use 2.5v control and full-scale voltages. inputs the noninverting inputs (pins 1 and 14) are easy to drive since they look like a 17m resistor in parallel with a 1.5pf capacitor at most frequencies. however, the input stage can oscillate at very high frequencies (100mhz to 200mhz) if the source impedance is inductive (like an unterminated cable). several inches of wire look inductive at these high frequencies and can cause oscillations. check for oscilla- tions at the inverting inputs (pins 2 and 13) with a 10 probe and a 200mhz oscilloscope. a small capacitor (10pf to 50pf) from the input to ground or a small resistor (100 w to 300 w ) in series with the input will stop these parasitic oscillations, even when the source is inductive. these components must be within an inch of the ic in order to be effective. all of the inputs to the lt1251/LT1256 have esd protec- tion circuits. during normal operation these circuits have no effect. if the voltage between the noninverting and inverting inputs exceeds 6v, the protection circuits will trigger and attempt to short the inputs together. this condition will continue until the voltage drops to less than 500mv or the current to less than 10ma. if a very fast edge is used to measure settling time with an input step of more than 6v, the protection circuits will cause the 1mv settling time to become hundreds of microseconds. feedback resistor selection the feedback resistor value determines the bandwidth of the lt1251/LT1256 as in other current feedback amplifi- ers. the curves in the typical performance characteristics show the effect of the feedback resistor on small-signal bandwidth for various loads, gains and supply voltages. the bandwidth is limited at high gains by the 500mhz to 800mhz gain-bandwidth product as shown in the curves. capacitance on the inverting input will cause peaking and increase the bandwidth. take care to minimize the stray capacitance on pins 2 and 13 during printed circuit board layout for flat response. if the two input stages are not operating with equal gain, the gain versus control voltage characteristic will be nonlinear. this is true even if r f1 equals r f2 . this is because the open-loop characteristic of a current feed- back amplifier is dependent on the thevenin impedance at the inverting input. for linear control of the gain, the loop gain of the two stages must be equal. for an extreme example, lets take a gain of 101 on input 1, r f1 = 1.5k and r g1 = 15 w , and unity-gain on input 2, r f2 = 1.5k. the curve in figure 1 shows about 25% error at midscale. to eliminate this nonlinearity we must change the value of r f2 . the correct value is the thevenin impedance at inverting input 1 (including the internal resistance of 27 w ) times the gain set at input 1. for a linear gain versus control voltage characteristic when input 2 is operating at unity-gain, the formula is: r f2 = (a v1 )(r f1 ?? r g1 + 27) r f2 = (101)(14.85 + 27) = 4227 because the feedback resistor of the unity-gain input is increased, the bandwidth will be lower and the output noise will be higher. we can improve this situation by reducing the values of r f1 and r g1 , but at high gains the internal 27 w dominates.
11 lt1251/LT1256 applicatio n s i n for m atio n wu u u capacitive loads increasing the value of the feedback resistor reduces the bandwidth and open-loop gain of the lt1251/LT1256; therefore, the pole introduced by a capacitive load can be overcome. if there is little or no resistive load in parallel with the load capacitance, the output stage will resonate, peak and possibly oscillate. with a resistive load of 150 w , any capacitive load can be accommodated by increasing the feedback resistor. if the capacitive load cannot be paralleled with a dc load of 150 w , a network of 200pf in series with 100 w should be placed from the output to ground. then the feedback resistor should be selected for best response. the null pin pin 6 can be used to adjust the gain of an internal current mirror to change the output offset. the open circuit voltage at pin 6 is set by the full scale current i fs flowing through 200 w to the negative supply. therefore, the null pin sits 100mv above the negative supply with v fs equal to 2.5v. any op amp whose output swings within a few millivolts of the negative supply can drive the null pin. the am modulator application shows an lt1077 driving the null pin to eliminate the output dc offset voltage. crosstalk the amount of signal from the off input that appears at the output is a function of frequency and the circuit topology. the nature of a current feedback input stage is to force the voltage at the inverting input to be equal to the voltage at the noninverting input. this is independent of feedback and forced by a buffer amplifier between the inputs. when the lt1251/LT1256 are operating noninverting, the off input signal is present at the inverting input. since one end of the feedback resistor is connected to this input, the off signal is only a feedback resistor away from the output. the amount of unwanted signal at the output is deter- mined by the size of the feedback resistor and the output impedance of the lt1251/LT1256. the output impedance rises with increasing frequency resulting in more crosstalk at higher frequencies. additionally, the current that flows in the inverting input is diverted to the supplies within the chip and some of this signal will also show up at the output. with a 1.5k feedback resistor, the crosstalk is down about 86db at low frequencies and rises to C 78db at 1mhz and on to C 60db at 6mhz. the curves show the details. distortion when only one input is contributing to the output (v c = 0% or 100%) the lt1251/LT1256 have very low distortion. as the control reduces the output, the distortion will increase. the amount of increase is a function of the current that flows in the inverting input. larger input signals generate more distortion. using a larger feedback resistor will reduce the distortion at the expense of higher output noise. control voltage (v) 0 gain (v/v) 100 50 0 2.0 1251/56 f01 0.5 1.0 1.5 2.5 r f2 = 4.3k r f2 = 1.5k v fs = 2.5v figure 1. linear gain control from 0 to 101
12 lt1251/LT1256 applicatio n s i n for m atio n wu u u figure 2 is the basic block diagram of the lt1251/LT1256 signal path with external resistors r g1 , r f1 , r g2 and r f2 . both input stages are operating as noninverting amplifiers with two input signals v 1 and v 2 . each input stage has a unity-gain buffer from the nonin- verting input to the inverting input. therefore, the inverting input is at the same voltage as the noninverting input. r 1 and r 2 represent the internal output resistances of these buffers, approximately 27 w . k is a constant determined by the control circuit and can be any value between 0 and 1. the control circuit is described in a later section. by inspection of the diagram: i v r rr rr v rr r r gf gf o f f g 1 1 1 11 11 11 1 1 1 = + ()() + - ++ ? ? ? ? substituting and rearranging gives: i v r rr rr v rr r r iki ki vi r sr c gf gf o f f g o oo ol ol 2 2 2 22 22 22 2 2 12 1 1 1 = + ()() + - ++ ? ? ? ? =+- () = + () ? ? ? ? ? general equation for the noninverting amplifier case v kv r rr rr kv r rr rr sr c r k rr r r k rr r r o gf gf gf gf ol ol f f g f f g = + ()() + + - () + ()() + + + ++ ? ? ? ? + - () ++ ? ? ? ? 1 1 11 11 2 2 22 22 11 1 1 22 2 2 1 1 1 1 1 + s 1 14 k i 1 i o 8 c v o 1251/56 bd i 1 i 2 i 2 1 k r 1 v 1 v 2 r 2 r g2 r g1 r ol r f1 r f2 2 13 +1 + 1 2 figure 2. signal path block diagram signal path description
13 lt1251/LT1256 applicatio n s i n for m atio n wu u u in low gain applications, r 1 and r 2 are small compared to the feedback resistors and therefore we can simplify the equation to: v kv rr rr kv rr rr sr c r k r k r o gf gf gf gf ol ol f f = ()() + + - () ()() + + ++ - () 1 11 11 2 22 22 12 1 1 1 note that the denominator causes a gain error due to the open-loop gain (typically 0.1% for frequencies below 20khz) and for mismatches in r f1 and r f2 . a 1% mis- match in the feedback resistors results in a 0.25% error at k = 0.5. if we set r f1 = r f2 and assume r ol >> r f1 (a 0.1% error at low frequencies) the above equation simplifies to: and vkva kva where a r r a r r ov v v f g v f g =+- () =+ =+ 11 22 1 1 1 2 2 2 1 11 this shows that the output fades linearly from input 2, times its gain, to input 1, times its gain, as k goes from 0 to 1. if only one input is used (for example, v 1 ) and pin 14 is grounded, then the gain is proportional to k. v v ka o v 1 1 = similarly for the inverting case where the noninverting inputs are grounded and the input voltages v 1 and v 2 drive the normally grounded ends of r g1 and r g2 , we get: general equation for the inverting amplifier case v kv rr r r kv rr r r sr c r k rr r r k rr r r o g g f g g f ol ol f f g f f g =- ++ ? ? ? ? + - () ++ ? ? ? ? + + ++ ? ? ? ? + - () ++ ? ? ? ? 1 11 1 1 2 22 2 2 11 1 1 22 2 2 1 1 1 1 1 1 1 note that the denominator is the same as the noninverting case. in low gain applications, r 1 and r 2 are small compared to the feedback resistors and therefore we can simplify the equation to: v kv r kv r sr c r k r k r o gg ol ol f f =- + - () + ++ - () 1 1 2 2 12 1 1 1 again, if we set r f1 = r f2 and assume r ol >> r f1 (a 0.1% error at low frequencies) the above equation simplifies to: and vkva kva where a r r a r r ov v v f g v f g =- + - () [] == 11 22 1 1 1 2 2 2 1 the 4-resistor difference amplifier yields the same result as the inverting amplifier case, and the common mode rejection is independent of k.
14 lt1251/LT1256 applicatio n s i n for m atio n wu u u control circuit description 1251/56 f03 i fs i c i c v c v fs i fs r fs v + r c 3 5 12 11 10 4 + + control v to i full scale v to i cfs r fs 5k r c 5k gain) is 3% as detailed in the electrical tables. by using a 2.5v full-scale voltage and the internal resistors, no additional errors need be accounted for. in the LT1256, k changes linearly with i c . to insure that k is zero, v c must be negative 15mv or more to overcome the worst-case control op amp offset. similarly to insure that k is 100%, v c must be 3% larger than v fs based on the guaranteed gain accuracy. to eliminate the overdrive requirement, the lt1251 has internal circuitry that senses when the control current is at about 5% and sets k to 0%. similarly, at about 95% it sets k to 100%. the lt1251 guarantees that a 2% (50mv) input gives zero and 98% (2.45v) gives 100%. the operating currents of the lt1251/LT1256 are derived from i fs and therefore the quiescent current is a function of v fs and r fs . the electrical tables show the supply current for three values of v fs including zero. an approxi- mate formula for the supply current is: i s = 1ma + (24)(i fs ) + (v s /20k) where v s is the total supply voltage between pins 9 and 7. by reducing i fs the supply current can be reduced, how- ever, the slew rate and bandwidth will also be reduced as indicated in the characteristic curves. using the internal resistors (5k) with v fs equal to 2.5v results in i fs equal to 500 m a; there is no reason to use a larger value of i fs . the inverting inputs of the v-to-i converters are available so that external resistors can be used instead of the internal ones. for example, if a 10v full-scale voltage is desired, an external pair of 20k resistors should be used to set i fs to 500 m a. the positive supply voltage must be 2.5v greater than the maximum v c and/or v fs to keep the transistors from saturating. do not use the internal resis- tors with external resistors because the internal resistors have a large positive temperature coefficient (0.2%/ c) that will cause gain errors. if the control voltage is applied to the free end of resistor r c (pin 5) and the v c input (pin 3) is grounded, the polarity of the control voltage must be inverted. therefore, k will be 0% for zero input and 100% for C 2.5v input, assuming v fs equals 2.5v. with pin 3 grounded, pin 4 is a virtual ground; this is convenient for summing several negative going control signals. the control section of the lt1251/LT1256 consists of two identical voltage-to-current converters (v-to-i); each v-to-i contains an op amp, an npn transistor and a resistor. the converter on the right generates a full-scale current i fs and the one on the left generates a control current i c . the ratio i c /i fs is called k. k goes from a minimum of zero (when i c is zero) to a maximum of one (when i c is equal to, or greater than, i fs ). k determines the gain from each signal input to the output. the op amp in each v-to-i drives the transistor until the voltage at the inverting input is the same as the voltage at the noninverting input. if the open end of the resistor (pin 5 or 10) is grounded, the voltage across the resistor is the same as the voltage at the noninverting input. the emitter current is therefore equal to the input voltage v c divided by the resistor value r c . the collector current is essentially the same as the emitter current and it is the ratio of the two collector currents that sets the gain. the lt1251/LT1256 are tested with pins 5 and 10 grounded and a full-scale voltage of 2.5v applied to v fs (pin 12). this sets i fs at approximately 500 m a; the control voltage v c is applied to pin 3. when the control voltage is negative or zero, i c is zero and k is zero. when v c is 2.5v or greater, i c is equal to or greater than i fs and k is one. the gain of channel one goes from 0% to 100% as v c goes from zero to 2.5v. the gain of channel two goes the opposite way, from 100% down to 0%. the worst-case error in k (the figure 3. control circuit block diagram
15 lt1251/LT1256 + + 1mhz carrier audio modulation 2.5vdc input 50 w r f2 1.5k v out r f1 1.5k i c v + v + v v null 1251/56 ta03 2 + + 1 2 3 4 5 6 7 14 13 12 11 10 9 8 control LT1256 1 c 0.1 m f 220k 220k 220k fs 5k 5k i fs 0.1 m f 0.1 m f + lt1077 am modulator with dc output nulling circuit typical applicatio n s u 10k 10k 5v r f1 1.5k r f2 1.5k r g2 1.5k r g1 1.5k v1 v2 1251/56 ta06 2 8 9 14 13 7 12 10 5 3 1 10 m f 10 m f 10 m f 10 m f 5v 5v 20k 20k + + 10 m f m p v c r c r fs v fs v + v + + lt1251/LT1256 1 2 v ref v out v out ltc1257 gnd v cc d in clk load + + + single supply noninverting ac amplifier with digital gain control single supply inverting ac amplifier r2 20k r1 20k r f1 1.5k r f2 1.5k r g1 1.5k r g2 1.5k v + v1 v2 1251/56 ta05 2 8 9 14 13 7 12 10 5 3 1 c1 10 m f 5v v out 2.5vdc input control voltage c o 10 m f + c2 10 m f + v c r c r fs v fs v + v + lt1251/LT1256 2 + 1 +
16 lt1251/LT1256 typical applicatio n s u controlled gain, voltage-to-current converter (current source) r f 1k r f 1k r f 1k output resistance depends on matching of resistors r f 1k r g 100 w 4 v in 1251/56 ta09 2 8 14 13 12 10 5 3 1 i out v c r c r fs v fs LT1256 + + 2 1 r o 1k + lt1363 i out = () v in r o r f r g v c v fs 2.5vdc input control voltage r1 r3 v in 1251/56 ta13 r r inverted highpass allpass lowpass r4 r2 + lt1252 basic variable integrator 1.5k 2 8 c c 14 13 12 10 5 3 1 v c v c r c r fs v fs v fs LT1256 + + 2 1 1.5k r r r dc @ 10k r1 r2 r3 r4 = variable lowpass, highpass and allpass filter
17 lt1251/LT1256 typical applicatio n s u logarithmic gain control (noninverting) logarithmic gain control (inverting) 1k 200 w 200 w 100pf 100pf 50 w 1251/56 ta11 2 8 7 5, 4, 6 5v 10 m f 2.5vdc input v out 14 13 12 10 5 3 1 v c r c r fs v fs lt1251/LT1256 + + 2 1 1k 10k 1k 1 2 3 1.6k 1.6k + lt1116 + 1.5k 1251/56 ta12 2 8 v in v out c c the time constant is inversely proportional to v c . r dc is required to define the dc output when the control is at zero. 14 13 12 10 5 3 1 v c v c r c r fs v fs v fs LT1256 + + 2 1 1.5k r r r dc @ 10k t(s) = ? (s)(r)(c) v fs v c () 1mhz wien bridge oscillator basic variable integrator 600 w 200 w 2k 6k 1.5k v in 1251/56 ta07a 2 8 14 13 12 10 5 3 1 v out 2.5vdc input v c control voltage r c r fs v fs 9 7 v + v lt1251/LT1256 + + 2 1 6k 6k 1.5k 1.5k v in 1251/56 ta08a 2 8 9 14 13 7 12 10 5 3 1 v out 2.5vdc input v c control voltage r c r fs v fs v + v lt1251/LT1256 + + 2 1 control voltage (v) 0 gain (db) 15 0 ?5 1251/56 ta07b 1.25 2.5 v fs = 2.5v a v = 24db ?0.5 () v c v fs <1db error control voltage (v) 0 gain (db) 15 0 ?5 1251/56 ta08b 1.25 2.5 v fs = 2.5v a v = 24db ?0.5 () v c v fs <1db error
18 lt1251/LT1256 typical applicatio n s u r9 1.5k 1251/56 ta14a 2 8 v in c2 100pf c5 50pf c1 0.001 m f 14 13 12 2.5v 10 5 3 1 v c v c r c r fs v fs LT1256 + + 2 1 r7 150 w r8 910 w r10 1.5k r4 1k r11 150 w r2 1k r1 470 w r5 430 w r6 430 w r3 470 w c3, 100pf c4 0.002 m f r12, 10k + 1/2 lt1253 c ' 1 0.001 m f r ' 9 1.5k 2 8 c ' 2 100pf c ' 5 50pf 14 13 12 2.5v 10 5 3 1 v c v c r c r fs v fs LT1256 + + 2 1 r ' 7 150 w r ' 8 910 w r ' 10 1.5k r ' 4 1k r ' 11 150 w r ' 2 1k r ' 5 430 w r ' 6 430 w r ' 3 470 w c ' 3, 100pf c ' 4 0.002 m f r ' 12, 10k + 1/2 lt1253 c '' 1 0.001 m f r '' 9 1.5k 2 8 c '' 2 100pf c '' 5 50pf 14 13 12 2.5v 10 5 3 1 v c v c r c r fs v fs LT1256 + + 2 1 r '' 7 150 w r '' 8 910 w r '' 10 1.5k r '' 4 1k r '' 11 150 w 75 w v out 1k 10k r '' 2 1k r '' 5 430 w r '' 6 430 w r '' 3 470 w c '' 3, 100pf c '' 4 0.002 m f r '' 12, 10k 1k + 1/2 lt1253 1000pf + 1/2 lt1253 3.58mhz phase shifter control voltage, v c (v) 0 0.5 1.0 normalized gain (v/v) phase (deg) 1.00 0.98 0.96 0.94 420 360 300 240 180 120 60 0 1251/56 ta14b 1.5 2.0 2.5 gain phase
19 lt1251/LT1256 typical applicatio n s u v w (v) 0 350 300 250 200 150 100 50 0 1.5 1251/56 ta15b 0.5 1.0 2.0 2.5 peak frequency of bp (khz) v fs = 2.5v center frequency vs control voltage v w q vs control voltage v q 1.5k 500 w 1251/56 ta15a 2 8 v in 500pf 500pf 14 13 12 10 5 3 1 v c r c r fs v fs v fs LT1256 + + 2 1 1.5k hp out bp out lp out 1k 1k 1k 1.5k 1.5k 1k 1k 1k 1k 500pf 500pf 1.5k 2 8 14 13 12 10 5 3 1 v c r c r fs v fs v fs LT1256 + + 2 1 1.5k 1.5k 2 8 14 13 12 10 5 3 1 v c r c r fs v fs v fs v fs = 2.5v v q LT1256 + + 2 1 + lt1252 v w v w v q (v) 0 q 6 5 4 3 2 1 0 0.5 1.0 1.5 2.0 1251/56 ta15c 2.5 v fs = 2.5v state variable filter with adjustable frequency and q
20 lt1251/LT1256 acro odel ww for pspice tm * * linear technology lt1251/LT1256 video fader macromodel * written: 3-11-1994 by william h. gross. * corrected: 7-15-1996 * connections: as per datasheet pinout *1=first noninverting input *2=first inverting input *3=control voltage input *4=control current input *5=control resistor, rc *6=null input *7=negative supply *8=output *9=positive supply *10=full scale resistor, rfs *11=full scale current input *12=full scale voltage input *13=second inverting input *14=second noninverting input * .subckt lt1251 1 2 3 4 5 6 7 8 9 10 11 12 13 14 * *first input stage ib1 1 0 500na ri1 1 0 17meg c1 1 0 1.5pf e1 2a 0 value={limit (v(1), v(8n)+0.4, v(8p)C0.4)+v(en)/30} vos1 2a 2b 2.5mv r1 2b 2 27 c2 2 0 1pf * *second input stage ib2 14 0 450na ri2 14 0 17meg c14 14 0 1.5pf e2 13a 0 value={limit (v(14), v(8n)+0.4, v(8p)C0.4)+v(en)/30} vos2 13a 13b 1.5mv r2 13b 13 27 c13 13 0 1pf * *control amp ibc 3 0 C300na ric 3 0 100meg c3 3 0 1pf r3 3 3a 1600 cbwc 3a 0 10pf ec 3b 0 3a 0 1.0 vosc 3b 4 5mv c4 4 0 1pf rc 4 5 5k c5 5 0 1pf * pspice is a trademark of microsim corporation
21 lt1251/LT1256 acro odel ww *full scale amp ibfs 12 0 C300na rifs 12 0 100meg c12 12 0 1pf r12 12 12a 1600 cbwfs 12a 0 10pf efs 12b 0 12a 0 1.0 vosfs 12b 11 C5mv c11 11 0 1pf rfs 11 10 5k c10 10 0 1pf * *generating k *** the next two lines are for the lt1251 ek k 0 table {i(vosc)/i(vosfs)}= (C100,0) (0.04,0) (0.1,0.11) + (0.9,0.907) (0.95,1.0) (100,1.0) *** the next two lines are for the LT1256 *ek k 0 table {i(vosc)/i(vosfs)}= (C100,0) (0,0) (0.2,0.21) *+ (0.9,0.9) (1.0,1.0) (100,1.0) rdummy k 0 1meg rnoise1 en 0 200k rnoise2 en 0 200k *generates 40.7nv/rthz * *null circuit gnull 7 6a value={i(vosfs)} rn1 6a 7 200 vnull 6a 6b 0.0v rn2 6b 6 400 c6 6 7 1pf * *output stage e6 8a 0 +value={1.8meg*(i(vos1)*v(k)+i(vos2)*(1Cv(k))Ci(vnull)+0.10ua+0.0007*v(en))} rg 8a 8b 1.8meg cg 8b 0 3.4pf e8 8c 0 8b 0 1.0 v8 8c 8d 0.0v r8 8d 8 11 * *output swing and current limit dp 8b 8p d1 vdp 8p 9 C1.4v dn 8n 8b d1 vdn 8n 7 1.4v .model d1 d gcl 8b 0 table {i(v8)}=(C1,C1)(C0.04,0)(0.04,0)(1,1) * *supply current gq 9 7 value={1ma+24*i(vosfs)+(v(7)Cv(9))/20k} gcc 9 0 table {i(v8)}=(C1,0)(0,0)(1,1) gee 7 0 table {i(v8)}=(C1,C1)(0,0)(1,0) * .ends lt1251
22 lt1251/LT1256 lt1251/LT1256 macro model for pspice acro odel ww 2b pin # in node # in first input stage output stage and voltage swing/current limit 1 2 1251/56 mm 2a c1 1.5pf ri 1 17m v os1 r1 27 w i b1 500na c2 1pf e1 8a 8b 8p d p d n 8n r g 1.8m c g 3.4pf e6 13b second input stage 14 13 13a c14 1.5pf ri 2 17m v os2 r2 27 w i b2 450na c13 1pf e2 7 g ee 9 g cc 9 7 g q control amp 3 5 4 3a 3b c3 1pf c bwc 10pf ri c 100m v osc r c 5k r3 1.6k i bc ?00na c4 1pf c5 1pf e c full scale amp 12 10 11 12a 12b c12 1pf c bwfs 10pf ri fs 100m v osfs r fs 5k r12 1.6k i bfs ?00na c11 1pf c10 1pf null circuit e fs 8 8c 8d r8 11 w e8 v8 k generator k r dummy 1m e k noise generator en r noise2 200k r noise1 200k 6b 6a 6 c6 1pf r n1 200 w r n2 400 w g null v null 7 supply currents v dp v dn g cl 9 7
23 lt1251/LT1256 information furnished by linear technology corporation is believed to be accurate and reliable. however, no responsibility is assumed for its use. linear technology corporation makes no represen- tation that the interconnection of its circuits as described herein will not infringe on existing patent rights. package descriptio n u dimensions in inches (millimeters) unless otherwise noted. n package 14-lead pdip (narrow 0.300) (ltc dwg # 05-08-1510) n14 0695 0.009 ?0.015 (0.229 ?0.381) 0.300 ?0.325 (7.620 ?8.255) 0.325 +0.025 0.015 +0.635 0.381 8.255 () 0.255 0.015* (6.477 0.381) 0.770* (19.558) max 3 1 2 4 5 6 7 8 9 10 11 12 13 14 0.015 (0.380) min 0.125 (3.175) min 0.130 0.005 (3.302 0.127) 0.045 ?0.065 (1.143 ?1.651) 0.065 (1.651) typ 0.018 0.003 (0.457 0.076) 0.100 0.010 (2.540 0.254) 0.005 (0.125) min *these dimensions do not include mold flash or protrusions. mold flash or protrusions shall not exceed 0.010 inch (0.254mm) 0.016 ?0.050 0.406 ?1.270 0.010 ?0.020 (0.254 ?0.508) 45 0 ?8 typ 0.008 ?0.010 (0.203 ?0.254) s14 0695 1 2 3 4 0.150 ?0.157** (3.810 ?3.988) 14 13 0.337 ?0.344* (8.560 ?8.738) 0.228 ?0.244 (5.791 ?6.197) 12 11 10 9 5 6 7 8 0.053 ?0.069 (1.346 ?1.752) 0.014 ?0.019 (0.355 ?0.483) 0.004 ?0.010 (0.101 ?0.254) 0.050 (1.270) typ dimension does not include mold flash. mold flash shall not exceed 0.006" (0.152mm) per side dimension does not include interlead flash. interlead flash shall not exceed 0.010" (0.254mm) per side * ** s package 14-lead plastic small outline (narrow 0.150) (ltc dwg # 05-08-1610)
24 lt1251/LT1256 linear technology corporation 1630 mccarthy blvd., milpitas, ca 95035-7417 (408) 432-1900 l fax : (408) 434-0507 l telex : 499-3977 lt/gp 0896 rev a 5k ? printed in usa ? linear technology corporation 1994 typical applicatio n s u 4-quadrant multiplier as a double-sideband suppressed-carrier modulator modulation gain vs control voltage + + 1mhz carrier modulation 10k 10k* r f2 1.5k v out r f1 1.5k i c v + v 1251/56 ta04a 2 + + 1 2 3 4 5 6 7 14 13 12 11 10 9 8 control LT1256 1 cfs 5k 5k i fs 0.1 m f 0.1 m f *trim for symmetry 2.5vdc input r g1 1.5k control voltage, pin 3 (v) 0 gain (v/v) 1.0 0.8 0.6 0.4 0.2 0 0.2 0.4 0.6 0.8 1.0 2.0 1251/56 ta04b 0.5 1.0 1.5 2.5 v s = ?v v fs = 2.5v 1.5k 1.5k 1n914 1n914 1k 5k v in 1251/56 ta10a 2 8 200pf 2.5vdc input 14 13 12 10 5 3 1 v out v c r c r fs v fs LT1256 + + 2 1 9 7 v + v soft clipper v fs = 2.5v v s = 5v f = 1khz 1251/56 ta10b v in v out part number description comments lt1228 100mhz current feedback amplifier with dc gain control includes a 75mhz transconductance amplifier lt1252 low cost video amplifier 100mhz bandwidth lt1253/lt1254 low cost dual and quad video amplifiers 90 mhz bandwidth lt1259/lt1260 low cost dual and triple 130mhz current feedback makes fast video mux amplifiers with shutdown related parts

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